There are two main types of memory devices used in computers today, namely “non-volatile” and “volatile” memory devices. The name “non-volatile” comes from the fact that non-volatile memory devices maintain the data stored therein, even when power is removed or temporarily lost. It follows that the name “volatile” comes from the fact that volatile memory devices do not maintain the data stored therein when the power is removed or temporarily lost.
Common non-volatile memory devices include read only memory (ROM) devices, EPROM (erasable programmable ROM) devices, EEPROM (electrically erasable programmable ROM) devices, and flash RAM devices. Common volatile memory devices include dynamic random access memory (DRAM) and static random access memory (SRAM) devices. Volatile memory devices are widely used for temporary data storage, such as during data manipulation, since writing data into or reading data out of these devices can be performed quickly and easily. However, a disadvantage of these volatile memory devices is that they require the constant application of power, and in the case of DRAM a data refresh signal, to maintain data stored in the memory cells. Once power supplied to the device is interrupted, the data stored in the volatile memory cells is lost.
Non-volatile memory devices suffer from an endurance problem caused by repeated cycling of program and erase operations, as well as slower access speeds than volatile memory devices. SRAM devices have a fast data access speed and a long lifetime, and are therefore suitable for use in a computer system. However, since SRAM is a volatile memory device, the stored data stored will be lost if power is interrupted. Therefore, there was a recognized need to back up information stored in SRAM memories with non-volatile memory, in the event of power failure.
Consequently, non-volatile static random access memory (NVSRAM) has been developed, which pairs each SRAM cell with two EEPROM cells so as to produce a device capable of quickly storing the contents of the SRAM cell in the event of power loss and then retrieving of those contents when power is restored. Each EEPROM cell is comprised of a floating gate transistor that has a charge placed on its floating gate to modify the voltage threshold VT of that floating gate transistor, and this charge indicates the state of the binary data retained in that EEPROM cell.
Both EEPROM and NVSRAM memories suffer notable drawbacks. With EEPROM, while the minimal granularity of a store operation is one byte, the maximal granularity of a store operation is one page, which is one row—this means that only a single word line may be written to at once. Therefore, to store more than a row's worth of data into an EEPROM, a store must be performed sequentially on each row until the data to be written is complete. Since a store operation on an EEPROM may only store data to a single same page (row), storing a quantity of data in excess of one page (row) to an EEPROM requires multiple such operations, is time consuming, and consumes excessive power.
One advantage of NVSRAM is that it can store the contents of all of its SRAM cells to their respective EEPROM cells in parallel, making store operations of large amounts of data a quick operation. However, this is also a considerable drawback in that a conventional NVSRAM is only arranged to store the contents of all of its SRAM cells to their respective EEPROM cells in parallel, and if a store to fewer than all EEPROM cells is desired, it cannot be performed. The reasons for this are shown in FIG. 1, which it can be seen that every NVSRAM cell 10 receives the same power source line PS and same control gate line CGL, both of which are manipulated when performing store operations to the EEPROM cells. In addition, each row of NVSRAM cells 10 receives a respective wordline WL for that row.
Since it is desirable not only for there to be NVSRAM cells capable of performing a store operation on less than all of their EEPROM cells, but for such capability to have opcodes supporting the operations it makes possible, further development of NVSRAm technology is needed.